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Open Positions

Operations

5G ASIC Designer

Santa Clara or San Diego, California

Operations

Firmware Engineering

Santa Clara, California or Bangalore, India

Operations

Digital Signal Processing (Micro-Kernel) Engineer

Santa Clara or San Diego, California

Operations

5G PHY Control Firmware

Santa Clara, California or Bangalore, India

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5G ASIC Designer

Role Summary and Responsibilities

  • RTL Logic Design experience of multi-million gate ASICs.
  • Hands on experience in all aspects of the chip development process with proficiency in front end tools and methodologies.
  • Work with Design Verification team on top-level or block level functional/gate level verification and code coverage, including power aware debug.
  • Top/Block level RTL (Verilog or System Verilog) design, integration.
  • Implementation of Low power logic, targeting power, performance, area, and timing goals
  • Work on Linting, CDC, LEC and preferably Low Power check tools to implement design and check design quality
  • Experience with multiple clock domains and asynchronous interfaces.
  • Experience writing specifications and converting them to design.
  • Experience or knowledge of system architecture, CPU & IP Integration, and power and clock management designs desirable.
  • Ability to communicate effectively across all internal groups.
  • Familiarity with software and operating concepts is a plus.
  • Familiarity with scripting languages like Python is a plus.
  • Experience of 10+ years is a must

Firmware Engineering

Role Summary and Responsibilities

  • Have the experience on developing FW at embedded processor (e.g. ARM, RISC-V, etc)
  • Hands on experience in developing the PHY L1 layer for the communication standard (4G/5G/WLAN)
  • Have the professional knowledge/experience on C language
  • Hands on experience in FW architecture design including API definition
  • Familiar with the wireless communications standard (4G/5G/WLAN)
  • Familiar with the debugging tools (e.g. ICE, T32)
  • Ability to communicate effectively across all internal groups

Digital Signal Processing (Micro-Kernel) Engineer

Role Summary and Responsibilities

  • Familiar with the fixed point arithmetic (e.g. Q-format, rounding, saturation, etc)
  • Have the experience on implementing DSP algorithm at DSP processor with C (e.g. TI54x, TI6x or Tensilica, etc)
  • Have the experience on implementing/optimizing DSP algorithm at DSP processor with asm / C
  • Familiar with pipelined processor (e.g. stall, RAW, WAR, WAW hazards, forwarding, etc)
  • Have the professional knowledge/experience on C language
  • Have the basic understanding on asm language
  • Have a good knowledge on Digital Signal Processing (e.g. Nyquist Sampling Theorem, LTI, Digital filter, Fourier transform, Z-transform, DFT/FFT, etc)

5G PHY Control Firmware

Your role will include PHY Control Firmware activities such as:

  • Design and develop high quality functional firmware
  • Translate product requirements to FW functional requirements
  • Write detailed FW architecture specification covering functional, performance and KPI aspects
  • Develop high level design, low-level design specification
  • Design FW system to handle critical timing/synchronization to meet real-time needs of wireless protocols
  • Closely work with HW architects and system engineers to design HW-SW functional split and interfaces
  • Active part in Customer solution design
  • Functional troubleshooting at product level both in the lab and field
  • Perform effective SW/FW configuration management and release management
  • Support field performance activities and radio conformance tests